Sensor modules

AXS-017 — LSM6DSM 6-axis IMU PMOD module

Catalog #17 in the AruviX sensor line, level L3 (SPI). Uses the LSM6DSM instead of the catalog's original LSM6DSO: the LSM6DSM is the stock-KiCad-supported sibling (same LGA-14 3×2.5 mm class, same SPI register discipline and FIFO lesson), so no custom symbol/footprint is needed.

Level L3 ERC clean DRC clean Fab package 8 components

3D render of the AXS-017 PCB — Rendered from the PCB layout. No physical board has been manufactured.

Circuit review & bench-test guide →

Components#

Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.

Ref	Value	What it does on this board	Part number	Footprint
`C1`	100nF 16V X7R	VDD decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C2`	100nF 16V X7R	VDDIO decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`J1`	PMOD PLUG 2x6	PMOD peripheral plug (Digilent spec 1.2)	not selected generic	`PinHeader_2x06_P2.54mm_Horizontal`
`R1`	100R	Series protection on the sensor-driven MISO line	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R2`	100R	Series protection on the sensor-driven INT1 line	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R3`	100R	Series protection on the sensor-driven INT2 line	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R4`	10k	~CS idle pull-up so an unconfigured host cannot drop the part into I2C mode	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`U1`	LSM6DSM	6-axis IMU, 3-axis accelerometer + 3-axis gyroscope, SPI/I2C, 4 kB FIFO	`LSM6DSMTR` STMicroelectronics Datasheet ↗	`LGA-14_3x2.5mm_P0.5mm_LayoutBorder3x4y`

Signals#

Net labels used in the schematic, which are also the names the HDL top level should use.

3V3 CS_N GND IMU_INT1 IMU_INT2 IMU_SDO INT1 INT2 MISO MOSI SCK

Production status#

Schematic ERC	0 violations
PCB layout	complete
DRC	0 violations
Fab package	exported (24 gerbers + drill + CPL + BOM)
Fabricated	no — design stage only

Source: boards/sensor-modules/axs-017-lsm6dsm

Catalog #17 in the AruviX sensor line (../README.md), level L3 (SPI). Uses the LSM6DSM instead of the catalog's original LSM6DSO: the LSM6DSM is the stock-KiCad-supported sibling (same LGA-14 3×2.5 mm class, same SPI register discipline and FIFO lesson), so no custom symbol/footprint is needed.

Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.

What it teaches#

A 4-wire SPI master against a modern ST IMU: accel + gyro register maps, the 4 kB FIFO, ODR configuration, and interrupt-driven design (INT1/INT2 carry data-ready, wake-up, tilt, and step events).

Design#

LSM6DSMTR, LGA-14 3×2.5 mm. VDD and VDDIO both on 3V3, 100 nF each.
10 kΩ pull-up on ~CS so an unconfigured host can't drop the part into I2C mode; sensor-driven MISO/INT1/INT2 pass through 100 Ω series resistors.
Aux (mode 3/4) interface unused: OCS_Aux (aux SPI chip select, must not float low) is tied to VDDIO; SDx/SCx/SDO_Aux are left open as on ST's STEVAL eval boards (the pads are gated while the aux interface is disabled).

PMOD pin	1	2	3	4	5	6	7	8	9	10	11	12
Net	~CS	MOSI	MISO	SCK	GND	3V3	INT1	INT2	NC	NC	GND	3V3

SPI mode 0 or 3, max 10 MHz.

Regenerate#

python3 generate_design.py

Remaining for release#

[ ] PCB layout (20 × 25 mm outline), DRC, fab outputs
[ ] hdl/: SPI master core, LSM6DSM controller + FIFO reader, testbench, ECP5 demo
[ ] BOM export and availability check, design-review checklist