Lab modules

AXL-005 — 5 V Arduino-kit module adapter PMOD

Catalog #5 in the AruviX lab line, level L1 — the strategic adapter: it makes every Arduino "37-in-1" sensor kit a classroom already owns usable on AruviX day one.

Level L1 ERC clean No layout No fab package 44 components

Circuit review & bench-test guide →

Components#

Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.

Ref	Value	What it does on this board	Part number	Footprint
`C1`	100nF 16V X7R	U1 (AHCT) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C2`	100nF 16V X7R	U2 (AHCT) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C3`	100nF 16V X7R	U3 (AHCT) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C4`	100nF 16V X7R	U4 (AHCT) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C5`	100nF 16V X7R	U5 (LVC) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C6`	100nF 16V X7R	U6 (LVC) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C7`	100nF 16V X7R	U7 (LVC) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C8`	100nF 16V X7R	U8 (LVC) decoupling	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C9`	10uF 10V X5R	EXT_5V bulk at the screw terminal	`GRM21BR61A106KE19L` Murata	`C_0805_2012Metric`
`C10`	10uF 10V X5R	3V3 bulk at the PMOD plug	`GRM21BR61A106KE19L` Murata	`C_0805_2012Metric`
`J1`	PMOD PLUG 2x6	PMOD peripheral plug (Digilent spec 1.2)	not selected generic	`PinHeader_2x06_P2.54mm_Horizontal`
`J2`	CH1 S/V/G	Arduino-kit module socket CH1: 1 S(ignal), 2 V(+5V), 3 G(round)	not selected generic	`PinSocket_1x03_P2.54mm_Vertical`
`J3`	CH2 S/V/G	Arduino-kit module socket CH2: 1 S(ignal), 2 V(+5V), 3 G(round)	not selected generic	`PinSocket_1x03_P2.54mm_Vertical`
`J4`	CH3 S/V/G	Arduino-kit module socket CH3: 1 S(ignal), 2 V(+5V), 3 G(round)	not selected generic	`PinSocket_1x03_P2.54mm_Vertical`
`J5`	CH4 S/V/G	Arduino-kit module socket CH4: 1 S(ignal), 2 V(+5V), 3 G(round)	not selected generic	`PinSocket_1x03_P2.54mm_Vertical`
`J6`	EXT 5V IN	External 5 V for the kit modules and AHCT gates: 1 +5V, 2 GND	not selected Phoenix Contact	`TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_Horizontal`
`JP1`	CH1 DIR (1-2=IN)	CH1 direction: 1-2 (default) input 5->3.3, 2-3 output 3.3->5	—	`SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm`
`JP2`	CH2 DIR (1-2=IN)	CH2 direction: 1-2 (default) input 5->3.3, 2-3 output 3.3->5	—	`SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm`
`JP3`	CH3 DIR (1-2=IN)	CH3 direction: 1-2 (default) input 5->3.3, 2-3 output 3.3->5	—	`SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm`
`JP4`	CH4 DIR (1-2=IN)	CH4 direction: 1-2 (default) input 5->3.3, 2-3 output 3.3->5	—	`SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm`
`R1`	100R	Series protection on the module-driven CH1 receive path	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R2`	100R	Series protection on the module-driven CH2 receive path	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R3`	100R	Series protection on the module-driven CH3 receive path	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R4`	100R	Series protection on the module-driven CH4 receive path	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R5`	10k	CH1 AHCT ~OE pull-up: drive gate disabled unless JP1 bridges 2-3	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R6`	10k	CH2 AHCT ~OE pull-up: drive gate disabled unless JP2 bridges 2-3	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R7`	10k	CH3 AHCT ~OE pull-up: drive gate disabled unless JP3 bridges 2-3	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R8`	10k	CH4 AHCT ~OE pull-up: drive gate disabled unless JP4 bridges 2-3	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R9`	10k	CH1 LVC ~OE pull-up: receive gate disabled unless JP1 bridges 1-2	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R10`	10k	CH2 LVC ~OE pull-up: receive gate disabled unless JP2 bridges 1-2	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R11`	10k	CH3 LVC ~OE pull-up: receive gate disabled unless JP3 bridges 1-2	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R12`	10k	CH4 LVC ~OE pull-up: receive gate disabled unless JP4 bridges 1-2	`RC0603FR-0710KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R13`	100k	CH1 socket idle pull-down (defined level with no module fitted)	`RC0603FR-07100KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R14`	100k	CH2 socket idle pull-down (defined level with no module fitted)	`RC0603FR-07100KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R15`	100k	CH3 socket idle pull-down (defined level with no module fitted)	`RC0603FR-07100KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R16`	100k	CH4 socket idle pull-down (defined level with no module fitted)	`RC0603FR-07100KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`U1`	74AHCT1G125	CH1 drive gate 3.3->5 V (VCC 5 V, TTL-compatible input)	`SN74AHCT1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U2`	74AHCT1G125	CH2 drive gate 3.3->5 V (VCC 5 V, TTL-compatible input)	`SN74AHCT1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U3`	74AHCT1G125	CH3 drive gate 3.3->5 V (VCC 5 V, TTL-compatible input)	`SN74AHCT1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U4`	74AHCT1G125	CH4 drive gate 3.3->5 V (VCC 5 V, TTL-compatible input)	`SN74AHCT1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U5`	SN74LVC1G125	CH1 receive gate 5->3.3 V (VCC 3.3 V, 5 V-tolerant input)	`SN74LVC1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U6`	SN74LVC1G125	CH2 receive gate 5->3.3 V (VCC 3.3 V, 5 V-tolerant input)	`SN74LVC1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U7`	SN74LVC1G125	CH3 receive gate 5->3.3 V (VCC 3.3 V, 5 V-tolerant input)	`SN74LVC1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`
`U8`	SN74LVC1G125	CH4 receive gate 5->3.3 V (VCC 3.3 V, 5 V-tolerant input)	`SN74LVC1G125DBVR` Texas Instruments Datasheet ↗	`SOT-23-5`

Signals#

Net labels used in the schematic, which are also the names the HDL top level should use.

3V3 CH1 CH1_RX CH2 CH2_RX CH3 CH3_RX CH4 CH4_RX DIR1_RX DIR1_TX DIR2_RX DIR2_TX DIR3_RX DIR3_TX DIR4_RX DIR4_TX EXT_5V GND S1 S2 S3 S4

Production status#

Schematic ERC	0 violations
PCB layout	not started
DRC	not run
Fab package	not exported
Fabricated	no — design stage only

Source: boards/lab-modules/axl-005-arduino

Catalog #5 in the AruviX lab line (../README.md), level L1 — the strategic adapter: it makes every Arduino "37-in-1" sensor kit a classroom already owns usable on AruviX day one.

Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.

Design (binding review finding applied)#

The line README review finding rejects the TXS0108E: auto-direction shifters are edge-rate sensitive and drive LEDs/long kit wires poorly. Direction is known per socket, so each of the 4 channels uses fixed-direction single gates with jumper-selected, complementary enables — exactly one gate ever drives, so there is no contention in any jumper state:

74AHCT1G125 (SN74AHCT1G125DBVR, SOT-23-5): 3.3 V → 5 V drive gate. VCC = EXT_5V; its TTL-compatible input accepts 3.3 V logic directly — the same trick as axa-005.
SN74LVC1G125 (SN74LVC1G125DBVR, SOT-23-5): 5 V → 3.3 V receive gate. VCC = 3V3; its input is 5 V-tolerant. Output passes 100 Ω series to the PMOD (module-driven line rule).
The socket S pin connects permanently to the AHCT output and the LVC input; JPn (3-way solder jumper, common = GND) grounds exactly one gate's ~OE, the other stays pulled to its rail (10 kΩ) = Hi-Z.
100 kΩ pull-down on each S pin: defined level with no module fitted.

Per-channel truth table#

JPn	AHCT ~OE	LVC ~OE	Data path	Mode
1-2 (default)	5 V (Hi-Z)	GND (drives)	S → LVC → 100R → PMOD	input (kit sensor)
2-3	GND (drives)	3V3 (Hi-Z)	PMOD → AHCT → S	output (kit LED/relay/buzzer)
open	Hi-Z	Hi-Z	none; S held low by 100k	safe mid-rework state

5 V rail#

External screw terminal J6 only (line pattern): kit modules' V pins and the AHCT gates draw from EXT_5V. 5 V is never back-fed to the PMOD 3V3 pins.

Sockets#

4× 3-pin S/V/G female sockets (PinSocket_1x03_P2.54mm_Vertical, MPN TBD): pin 1 = S, 2 = V (EXT_5V), 3 = G. This matches the common kit order, but some clone modules swap V and G — check the module silkscreen first.

PMOD pin	1	2	3	4	5	6	7	8	9	10	11	12
Net	CH1	CH2	CH3	CH4	GND	3V3	NC	NC	NC	NC	GND	3V3

Regenerate#

python3 generate_design.py

Remaining for release#

[ ] PCB layout, DRC, fab outputs
[ ] Pin socket / screw-terminal MPNs
[ ] Decide open question: add Grove-style 4-pin sockets on the same board?
[ ] BOM export and availability check, design-review checklist