PMOD interface
The connector contract every module in the catalog obeys.
Source: Digilent Pmod Interface Specification 1.2.0 (revised 2017-10-05), retrieved 2026-07-12. These notes resolve the platform's open PMOD questions against the actual document; cite this file, not memory, in module reviews.
Pin numbering and orientation — VERIFIED#
- 12-pin module plug (spec Figure 2): pins 1–6 are the upper row when mated (the pad row farther from the board edge on a right-angle plug), pins 7–12 the lower row. Viewed from the module top with the connector pointing toward you, pin 1 is the rightmost pin of the upper row.
- Host receptacle numbering is the mirror image, so module pin N meets host pin N.
- The AXS-007 layout recipe matches this exactly (rotation 270, square pad top-right,
PMOD_TO_HEADERodd/even translation): the pre-fab verification item is closed.
Mechanical — resolves rev-A host decisions#
- Side-by-side host ports: 0.9" (22.86 mm) center-to-center. This is the required socket spacing on the ECP5 rev-A for the dual-PMOD modules (camera axs-050, VGA axo-007, scope axl-002), and dual-connector modules must also put their plugs on 0.9" centers.
- Single-connector modules: max 0.8" (20.32 mm) wide (our 20 mm outline fits), connector centered on that side, >25 mil component clearance from the board edge for the Pmod retaining clip.
Electrical#
- 3.3 V LVCMOS/LVTTL expected; host may optionally switch power pins between 3.3 V and 5.0 V — on 12-pin ports both power pins switch together (this is the sanctioned form of the "PMOD VU" idea in
../BACKLOG.md). - Module draw "should not be assumed more than approximately 100 mA" — ESP32/servo/heater class loads must take external power (our line rules already comply).
- Standard host ports carry ESD diodes and 200 Ω series resistors — adopt on ECP5 rev-A standard sockets; the spec's "high-speed ports" omit them (relevant if a raw socket is wanted for camera/RMII experiments).
- Non-I2C modules may not use open-drain outputs unless the pull-up is on the module (our 10k-pull-up rule complies).
Interface type numbers (1.2.0 — supersedes older 1.1.0 numbering)#
| Type | Interface | Pins 1-4 (upper row) |
|---|---|---|
| 1 / 1A | GPIO | IO1..IO4 (PWM on 2, and 8 for 1A) |
| 2 / 2A | SPI | CS, MOSI, MISO, SCK (+7 INT, 8 RESET, 9/10 CS2/3) |
| 3 / 3A | UART | CTS, TXD, RXD, RTS (+7 INT, 8 RESET) |
| 4 | H-Bridge | DIR, EN, SA, SB |
| 5 / 5A | Dual H-Bridge | DIR1, EN1, (S1A, S1B) / +7-10 DIR2, EN2, S2A, S2B |
| 6 | I2C | NC(INT), NC(RESET), SCL, SDA |
| 7 | I2S codec | LRCLK, DAC data, ADC data, BCLK (+9 MCLK option) |
Platform corrections applied 2026-07-12: UART modules relabeled Type 4→3 (axs-024/025/044/046); I2S mics realigned to Type 7 (axs-028/029: 1 WS, 3 SD, 4 SCK — was a custom map). The audio-out module (axo-011) must use Type 7's DAC-data slot (pin 2) when designed.
- Type 6 note: pins 1/2 are NC by default with INT/RESET as sanctioned alternates — our I2C modules' use of pin 1 INT / pin 2 aux conforms. The spec also expects INT/RESET pull-ups to be jumper-detachable for daisy chains; ours are fixed 10k (minor, documented deviation).
- Type 4/5A note: axa-001 (TB6612) uses a part-shaped map, not Type 5A signal names; acceptable (spec types are conventions, not requirements) but noted for a possible rev alignment.