Circuit review & bench-test guide
AXS-045 — MQ-series combustible-gas carrier PMOD module
Document purpose#
This document explains the axs-045-gas carrier at component level and turns the design evidence into a manual-review and bench-test plan. It is based on generate_design.py, the generated schematic, the README, and manufacturer documentation for the MQ-2 sensing element, the TI ADS7042 ADC, and the Nexperia BAT54S clamp.
The board is an unfabricated prototype: schematic generated, ERC clean (0/0), netlist reviewed, no PCB layout, no fabricated board, no BOM export, no bench results. The Phoenix terminal MPN is TBD:. The plug-in is a generic "MQ-2 comparator breakout" whose pin order and comparator behavior vary by vendor — the carrier can only be validated together with a specific purchased breakout.
1. What the board does#
The carrier hosts a common MQ-2 breakout (LPG/propane/smoke, SnO₂ heated element) on a 1×4 socket and makes its two outputs safe for a 3.3 V PMOD:
- AO (0–5 V analog) is divided 10 k/18 k (5 V → 3.21 V), RC-filtered (1 k + 10 nF), and digitized by an on-carrier ADS7042 12-bit SAR ADC on PMOD Type 2 SPI. Fabric multiplies readings by 28/18 to recover the 0–5 V breakout level.
- DO (comparator threshold output, pulls to 5 V on cheap breakouts) passes a 10 k series resistor into a BAT54S Schottky pair clamping to 3V3/GND, landing on PMOD pin 2 as a GPIO input.
The MQ-2 heater requires external 5 V on screw terminal J3 (~150 mA class, continuous — the element runs hot by design).
Functional block diagram#
EXT 5 V ──> J3 ──┬──> J2 pin 1 VCC ──> MQ-2 breakout (heater + comparator)
├── C4 100 nF
└── C5 10 µF
J2 pin 4 AO ──> R1 10 k ──┬── R2 18 k ──> GND (GAS_DIV = AO × 18/28)
└── R3 1 k ──┬──> U1 AINP (GAS_FILT)
└── C3 10 nF ──> GND
J2 pin 3 DO ──> R4 10 k ──> GAS_DO ──> PMOD pin 2
└── D1 BAT54S: A1→GND, K2→3V3 (clamp)
U1 ADS7042 (AVDD=DVDD=3V3, AINM=GND): SCLK=PMOD4, CS_N=PMOD1,
SDO ── R5 100 Ω ──> MISO (PMOD pin 3); C1 100 nF + C2 1 µF on 3V32. Safety and scope boundaries#
- This is a learning module, not a gas-safety device. An MQ-2 plus a hobby comparator breakout must never be relied on for leak protection, alarms, or any safety function. Calibration to ppm is out of scope.
- Combustible-gas testing: use tiny, ventilated puffs (e.g., unlit butane lighter at a distance). Never accumulate gas near the bench, sparks, or the hot sensor.
- The sensing element runs hot by design (heater ≤900 mW). The breakout will be warm to hot; keep flammables away and expect burnt-dust smell on first heating.
- MQ elements are poisoned by silicone vapors (RTV, conformal coat), corrosive gases, and salt spray; they lose sensitivity if wetted or frozen (manufacturer notification list). Store powered-off units sealed.
- Never feed 5 V into any PMOD pin. The 5 V domain is J3/C4/C5/J2 pin 1 and the breakout itself (including its DO pull-up — that is what R4/D1 exist for).
3. Supply sequencing, common ground, and no-host behavior#
- Common ground first. J3 GND, J2 pin 2, and PMOD GND are one net; buzz before power.
- Recommended order: PMOD host on first (3V3 present), then J3 5 V. Power down in reverse (5 V off first). Reason: with 5 V present and 3V3 absent, the breakout drives the carrier's protection networks into an unpowered ADC and a dead rail:
- AO can push GAS_FILT toward 3.2 V while U1's AVDD = 0 — above the ADS7042 absolute maximum (AINP ≤ AVDD + 0.3 V in abs-max terms), with current limited only by R1+R3 (11 k, ≈0.3 mA). Probably survivable, definitely out of spec.
- DO (pulled to 5 V on the breakout) pushes through R4 into D1's upper diode and back-powers the dead 3V3 rail (~0.5 mA max). Both currents are small because of the series resistors — that is good design — but "5 V on, host off" remains a prohibited steady state.
- 5 V with no PMOD host attached at all: the heater runs and the board gets warm; AO/DO drive into open or clamped nets at sub-mA levels. No damage expected, but there is also no reason to operate this way.
- The heater is a near-resistive ~31 Ω load: expect ≈160 mA continuous from J3 with a cold-start inrush slightly above that as the coil warms.
4. Plug-in module verification (read before first power)#
Mandatory section. MQ-2 breakout pin orders genuinely vary between vendors, and a swapped VCC/AO or VCC/GND connection can burn the divider or feed 5 V where it must not go.
4.1 Pin-order check against the breakout silkscreen#
The carrier assumes J2 order 1 VCC (5 V), 2 GND, 3 DO, 4 AO. Common breakouts also ship as VCC/GND/AO/DO (DO and AO swapped) and other orders. Before fitting a breakout:
- Read the breakout silkscreen next to its 4-pin header; write the order down. If the silkscreen is ambiguous, trace the board: VCC feeds the heater pins and the LM393; AO comes from the sensing-element divider; DO from the LM393 output/pull-up.
- With the carrier unpowered and the breakout unplugged, buzz carrier J2 pin 1 to the J3 +5 V terminal and pin 2 to GND.
- Confirm the breakout's VCC pin will land on J2 pin 1 and GND on pin 2 in the actual insertion orientation. A 1×4 socket has no key — mark the orientation on both boards with paint before first power.
- Consequences of getting it wrong: AO into the VCC position puts 5 V onto the divider continuously (survivable: 5 V across 28 k) — but DO into the VCC position leaves the breakout unpowered, and VCC into the AO position feeds the heater current path through R1/R2, burning 0603 resistors. Check twice.
4.2 Plug-in key specifications (Hanwei MQ-2 element; breakout-level notes)#
| Item | Manufacturer value (MQ-2 element) | Bench relevance |
|---|---|---|
| Heater voltage VH | 5.0 V ± 0.2 V AC or DC | J3 setting; keep ≤5.0 V to protect the divider margin (section 6) |
| Heater resistance RH | 31 Ω ± 3 Ω at room temperature | ≈150–165 mA continuous from 5 V (README's "~150 mA" is this number) |
| Heater power PH | ≤900 mW | The breakout runs hot; that is normal |
| Loop voltage VC | ≤24 V DC (element rating; breakout uses 5 V) | AO can range 0 to ~VCC |
| Sensing resistance RS | 2–20 kΩ in 2000 ppm propane | Wide part-to-part spread — per-unit characterization required |
| Detection range | 300–10000 ppm combustible gas | Qualitative bench response only |
| Preheat / burn-in | "Over 48 hours" standard preheat time | See honesty note below |
| Poisoning/degradation | Silicone vapors, corrosive gas, salt, water, freezing | Storage and handling rules |
Burn-in honesty note: the Hanwei datasheet's standard test condition is a preheat of over 48 hours. Community practice quotes 24–48 h for a stored sensor to drift back to a stable baseline, and minutes-scale warm-up before any single session's readings settle. Consequences for this project: (a) no quantitative result from a freshly unboxed sensor means anything; (b) the bench plan below deliberately grades only relative response and interface correctness, not ppm accuracy; (c) if the module is stored unpowered for months, budget another long burn-in (the datasheet notes reversible resistance drift in storage requiring re-aging).
Breakout-level cautions (vendor-dependent, verify per unit): the LM393 comparator's threshold is set by an on-board trimpot; DO polarity differs between boards (many pull DO low on detection with an LED indicator); and the DO pull-up is commonly a 1–10 k resistor to VCC = 5 V — the reason for R4/D1.
5. Component-by-component review#
#FLG01–#FLG03 are ERC power flags, not physical parts.
5.1 Connectors and ADC#
| Ref. | Part / value | Function and why needed | If absent/open | If shorted, wrong, or misassembled |
|---|---|---|---|---|
| J1 | 2×6 right-angle PMOD plug (MPN TBD:) | Host SPI (Type 2) + GAS_DO on pin 2 | No host link | Mirrored assembly puts rails on signals — verify pin-1 orientation |
| J2 | 1×4 pin socket 2.54 mm (MPN TBD:) | Breakout socket, order VCC/GND/DO/AO | No sensor | Unkeyed: reversed or offset insertion misroutes 5 V — see 4.1 |
| J3 | Phoenix MKDS 1,5/2-5,08 (MPN TBD:) | External 5 V for the heater | Heater never runs; AO meaningless | Reversed polarity feeds −5 V to the breakout; loose contact cycles the heater and ruins stability |
| U1 | TI ADS7042IDCUR, VSSOP-8 | 12-bit 1 MSPS SAR ADC; AVDD (=3V3) is also the reference | No analog readings | Pinout is verified against the datasheet (DCU: 1 DVDD, 2 SCLK, 3 SDO, 4 CS, 5 AINM, 6 AINP, 7 AVDD, 8 GND) — rotation/misplacement swaps supply onto SDO; poor VSSOP soldering shows up as stuck codes |
| D1 | Nexperia BAT54S,215, SOT-23 | Series Schottky pair: pin 1 A1→GND, pin 2 K2→3V3, pin 3 (K1;A2 midpoint)→GAS_DO; clamps to −VF…3V3+VF | DO can drive ~5 V into the FPGA pin (through R4) — the exact hazard this part exists to stop | Wrong orientation/rotation clamps the wrong node or shorts GAS_DO to a rail; BAT54S specifically (series variant) — A/C variants wired identically would not clamp correctly |
5.2 Resistors and capacitors#
| Ref. | Value / part | Function | If omitted or wrong |
|---|---|---|---|
| R1 | 10 kΩ, RC0603FR-0710KL | AO divider top | Open: ADC reads 0 (via R2/R3 to GND). Value error changes scale silently — see calibration test |
| R2 | 18 kΩ, RC0603FR-0718KL | AO divider bottom: 5 V × 18/28 = 3.214 V | Open: GAS_DIV floats to AO level — up to ~5 V at the RC, exceeding AVDD+0.3 at the ADC input (R3 limits current). Short: ADC always 0 |
| R3 | 1 kΩ, RC0603FR-071KL | Source resistor / anti-alias into the SAR charge bucket with C3 | Open: AINP floats; Short: SAR kickback noise increases slightly — benign |
| C3 | 10 nF 50 V C0G, GRM1885C1H103JA01D | Charge reservoir + RC filter (fc ≈ 15 kHz with R3; the divider impedance raises the effective time constant) | Open: conversion droop/noise; wrong dielectric (X7R) adds distortion — C0G is deliberate |
| R4 | 10 kΩ, RC0603FR-0710KL | DO series limiter into the clamp; with DO at 5 V, clamp current ≈ (5 − ~3.5)/10 k ≈ 0.15 mA | Do not bypass. Open: DO reads nothing. Short (0 Ω): clamp current rises ~×100 and D1/3V3 rail absorb mA-level injection |
| R5 | 100 Ω, RC0603FR-07100RL | Series protection on ADC-driven SDO | Open: MISO floats; host reads 0xFFF/garbage |
| C1 | 100 nF 16 V X7R, GRM188R71C104KA01D | U1 AVDD/DVDD decoupling at the pins | Conversion noise, worse INL — the datasheet's layout guidance calls for close placement |
| C2 | 1 µF 16 V X5R, GRM188R61C105KA93D | Reference/bulk decoupling for U1 (AVDD is the reference) | Reference droop during conversions → gain wobble |
| C4 | 100 nF 16 V X7R | Breakout supply decoupling | HF noise on the 5 V at the socket |
| C5 | 10 µF 10 V X5R, GRM21BR61A106KE19L | Heater bulk on EXT_5V | Droop at connection/inrush; benign but present for lead inductance |
6. Datasheet summary and design interpretation#
| Device | Key manufacturer facts | Board-specific interpretation |
|---|---|---|
| MQ-2 (Hanwei) | VH 5.0±0.2 V, RH 31±3 Ω, PH ≤900 mW, RS 2–20 kΩ @2000 ppm propane, preheat >48 h, 300–10000 ppm | Heater current ≈ 5.0/31 ≈ 161 mA nominal (144–179 mA over RH tolerance); J3 and wiring must handle it continuously |
| ADS7042 (TI SBAS608C) | 12-bit, 1 MSPS, AVDD 1.65–3.6 V is the reference, AINP range 0–AVDD (abs max AVDD+0.1 V operating, +0.3 abs), SCLK ≤16 MHz, CS-framed 16-clock read with 2 leading zeros, offset calibration on power-up | 3V3 AVDD ⇒ 1 LSB ≈ 0.81 mV; full-scale = 3.3 V so divider output must stay below it |
| Divider margin | 5.00 V × 18/28 = 3.214 V; with ±1 % resistors worst case ≈ 3.26 V; with J3 at 5.25 V ≈ 3.42 V | Margin is thin: keep J3 at 5.0 V or below. A 5.25 V "USB high" supply can push AINP past AVDD at full-scale AO. Bench rule: J3 = 5.00 V regulated |
| BAT54S (Nexperia, 2022-07-01) | 30 V VRRM, 200 mA IF, VF ≤240 mV @0.1 mA / ≤320 mV @1 mA, IR ≤2 µA @25 V; pins: 1 A1, 2 K2, 3 K1;A2 | At ~0.15 mA clamp current GAS_DO tops out near 3.3 + 0.25 ≈ 3.55 V — within the FPGA's VCCIO+0.3 ≈ 3.6 V window, but measure it (section 9.D) |
Official references: MQ-2 datasheet (Hanwei, Pololu mirror), ADS7042 datasheet SBAS608C / product page, BAT54S datasheet (Nexperia).
7. Expected values before bench testing#
| Quantity | Design target / calculated | What to measure |
|---|---|---|
| Heater current | ≈161 mA nominal (144–179 mA range) | J3 supply readout after 1 min |
| EXT_5V | 5.00 V regulated (do not exceed — divider margin) | DMM at J2 pin 1 |
| Divider ratio | 18/28 = 0.6429; 3.214 V out for 5.000 V in | Known-source test, section 9.C |
| ADC code for AINP = 3.214 V | ≈ 3989 of 4095 (AVDD = 3.300 V) | SPI readback |
| GAS_DO clamped high level | ≈3.4–3.6 V worst case (3V3 + VF at ~0.15 mA) | DMM/scope at PMOD pin 2, section 9.D |
| GAS_DO clamped low | ≥ −0.3 V | Scope during DO falling edges |
| SPI | Mode 0, CS-framed, 2 leading zeros + 12 bits MSB-first, SCLK ≤16 MHz | Logic analyzer |
| Warm-up | Minutes for session stability; >48 h burn-in for baseline | Log AO vs time |
8. Manual schematic and assembly review checklist#
- Verify the purchased breakout's pin order against J2 (section 4.1) and mark insertion orientation.
- Confirm U1 orientation (pin 1 = DVDD toward its 3V3 label) and D1 orientation (pin 3/midpoint to GAS_DO) under magnification.
- Measure R1, R2, R3, R4, R5 in-circuit before fitting the breakout; R1/R2 set the calibration.
- Confirm R2 returns to GND and R1 to the AO pad, not swapped (a swap gives ratio 10/28 — readings low by ×0.56).
- Confirm C1/C2 land at U1's pins after layout; C0G at C3.
- Close the three
TBD:MPNs; export and availability-check the BOM. - After layout: heater current path (J3→J2) sized appropriately; clamp D1 near the PMOD edge per the README intent.
9. Ordered bench-test procedure#
Stop at the first abnormal result.
A. Unpowered checks#
- Socket empty: resistance EXT_5V-to-GND, 3V3-to-GND, GAS_DO-to-3V3/GND (expect diode signatures through D1 in diode mode: ~0.3 V to both rails).
- Buzz J3 GND ↔ PMOD GND ↔ J2 pin 2.
- Verify divider: with the socket empty, inject nothing yet — just measure R1+R2 from the AO pad to GND ≈ 28 k, and R3 from GAS_DIV to GAS_FILT.
B. ADC alone (no breakout fitted)#
- Host on. Read the ADS7042 with AINP tied through the empty socket's AO pad left floating: short the AO pad to GND briefly — codes near 0 (±12 LSB uncalibrated offset per datasheet).
- Feed a known voltage (bench PSU through 1 k) into the AO pad: 1.000 V → expect code ≈ round(1.000 × 0.6429/3.300 × 4095) ≈ 797. Step 2.000 V (~1595), 3.000 V (~2392), 5.000 V (~3989). This is the AO divider scaling verification: fitted ratio error must match resistor tolerance (±2 % worst) and be recorded as this board's calibration constant.
- Confirm 28/18 recovery math in fabric returns the injected voltage.
C. DO clamp test (no breakout fitted)#
- Inject 5.00 V through the socket's DO pad (current-limited supply). Measure GAS_DO at PMOD pin 2: expect ≈3.4–3.6 V, and compute clamp current from the drop across R4 (≈0.15 mA). It must never read 5 V.
- Inject −1 V briefly through 10 k external: GAS_DO must clamp near −0.2…−0.3 V.
- Raise injection to 6 V: clamped level rises only by the VF slope. Record. (This bounds the "cheap breakout with hard 5 V pull-up" case with margin.)
D. First power with the breakout#
- Verify section 4.1 orientation marks. Host on, then J3 at 5.00 V, 300 mA limit.
- Current ≈150–180 mA; the element warms; burnt-dust smell on a new unit is normal for a few minutes.
- Log AO (via ADC) for 15 minutes: expect a large initial transient settling toward a baseline. Do not interpret absolute values within the first 24–48 h of cumulative powered time (burn-in note, section 4.2).
- Gas response (qualitative): a brief unlit-lighter puff at ~10 cm in a ventilated area — ADC value rises promptly and decays. Record shapes, not ppm.
- DO behavior: adjust the breakout trimpot so DO trips during the puff; confirm GAS_DO edge polarity (many boards drive DO low on detection) and clamped levels on the scope. Record polarity for the HDL.
E. Soak#
- 24 h powered soak (part of burn-in anyway): log ADC baseline drift, heater current, and J3/J2 terminal temperatures.
10. Troubleshooting map#
| Symptom | First measurements | Likely areas |
|---|---|---|
| No heater current | J3 voltage, J2 pin 1 | Breakout orientation, J3 wiring, socket contact |
| ADC always 0 | GAS_DIV, GAS_FILT voltages | R1 open, R2 short, AO not at pad 4 (pin-order error), U1 solder |
| ADC always full-scale | AINP vs AVDD | R2 open, AO/VCC swapped at the socket, AVDD missing |
| Scale off by ~×0.56 | Ratio from known-source test | R1/R2 swapped |
| Codes noisy | C3 present? C1/C2 at U1? SCLK integrity | Missing/wrong-dielectric C3, decoupling, long SPI leads |
| GAS_DO reads ~5 V | R4/D1 present and oriented | Unsafe: clamp defeated — stop and rework |
| DO never trips | Trimpot, DO at socket vs after R4 | Comparator threshold, R4 open, DO polarity assumption |
| Baseline drifts for days | Cumulative powered hours | Normal MQ burn-in; keep logging |
11. Bench record template#
| Field | Record |
|---|---|
| Board serial / assembly variant | |
| Breakout vendor, silkscreen order, orientation photos | |
| MQ-2 cumulative powered hours (burn-in tracker) | |
| Divider calibration constant (measured ratio) | |
| ADC known-source results | |
| DO clamp levels (5 V and 6 V injection) | |
| Heater current, terminal temperatures | |
| Gas-puff response record (qualitative) | |
| DO polarity for HDL | |
| 24 h soak result | |
| Reviewer / date / disposition |
12. Review conclusion#
This carrier takes the right lessons seriously: the 5 V heater lives on an external terminal, the analog path is divided and filtered into a properly decoupled ADC whose pinout matches the datasheet, and the one genuinely dangerous line (DO with a 5 V pull-up) gets both a series limiter and a verified-pinout BAT54S rail clamp. The principal risks are (1) breakout pin-order variation into an unkeyed 1×4 socket — the only class of error here that burns parts; (2) thin divider headroom if J3 drifts above 5.0 V — regulate it; (3) the MQ-2's >48 h burn-in and wide RS spread, which make any quick quantitative claim dishonest; and (4) no layout, fabrication, or bench evidence yet at this revision.