Sensor modules

AXS-029 — Stereo ICS-43434 I2S microphone-pair PMOD module

Catalog #29 in the AruviX sensor line, level L4 (stereo I2S streaming). Two of the AXS-028 microphone (TDK InvenSense ICS-43434) on one shared I2S bus.

Level L4 ERC clean DRC clean Fab package 7 components

3D render of the AXS-029 PCB — Rendered from the PCB layout. No physical board has been manufactured.

Circuit review & bench-test guide →

Components#

Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.

Ref	Value	What it does on this board	Part number	Footprint
`C1`	100nF 16V X7R	VDD decoupling close to U1	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`C2`	100nF 16V X7R	VDD decoupling close to U2	`GRM188R71C104KA01D` Murata	`C_0603_1608Metric`
`J1`	PMOD PLUG 2x6	PMOD peripheral plug (Digilent spec 1.2)	not selected generic	`PinHeader_2x06_P2.54mm_Horizontal`
`R1`	100R	Series protection on the shared microphone-driven data line	`RC0603FR-07100RL` Yageo Datasheet ↗	`R_0603_1608Metric`
`R2`	100k	SD idle pull-down: the tri-stated bus reads 0 outside both slots	`RC0603FR-07100KL` Yageo Datasheet ↗	`R_0603_1608Metric`
`U1`	ICS-43434	24-bit I2S digital MEMS microphone, left slot (LR=GND)	`ICS-43434` TDK InvenSense Datasheet ↗	`InvenSense_ICS-43434-6_3.5x2.65mm`
`U2`	ICS-43434	24-bit I2S digital MEMS microphone, right slot (LR=VDD)	`ICS-43434` TDK InvenSense Datasheet ↗	`InvenSense_ICS-43434-6_3.5x2.65mm`

Signals#

Net labels used in the schematic, which are also the names the HDL top level should use.

3V3 GND MIC_SD SCK SD WS

Production status#

Schematic ERC	0 violations
PCB layout	complete
DRC	0 violations
Fab package	exported (24 gerbers + drill + CPL + BOM)
Fabricated	no — design stage only

Source: boards/sensor-modules/axs-029-stereo-mics

Catalog #29 in the AruviX sensor line (../README.md), level L4 (stereo I2S streaming). Two of the AXS-028 microphone (TDK InvenSense ICS-43434) on one shared I2S bus.

Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.

What it teaches#

Stereo capture and the beamforming intro: I2S slot multiplexing (two tri-stated transmitters sharing one data line), interaural delay measurement, and simple delay-and-sum beamforming in fabric.

Design#

Two ICS-43434, hard-wired slots — no jumpers on this board: U1 LR = GND → left / WS-low slot; U2 LR = 3V3 → right / WS-high slot.
SCK and WS are host-driven to both mics in parallel.
Both SD outputs tie together (each mic tri-states outside its own slot) into one 100 Ω series resistor to PMOD pin 1, with one 100 kΩ pull-down so the idle bus reads 0.
The stock KiCad symbol types SD as a plain output; the generator patches the embedded copy to tri_state (the electrically true type per the datasheet) so ERC models the shared bus instead of flagging output-to-output.
One 100 nF decoupling capacitor per mic.
Layout target: 10 cm microphone spacing, both bottom-side port holes kept clear of paste and pour.

PMOD pin	1	2	3	4	5	6	7	8	9	10	11	12
Net	WS	NC	SD	SCK	GND	3V3	NC	NC	NC	NC	GND	3V3

SCK 0.5–3.6 MHz, WS = SCK/64: each frame carries a 24-bit left then a 24-bit right sample.

Regenerate#

python3 generate_design.py

Remaining for release#

[ ] PCB layout (elongated outline for the 10 cm mic spacing), DRC, fab outputs
[ ] hdl/: stereo I2S receiver, sample-pair FIFO, delay-and-sum beamformer demo, testbench
[ ] BOM export and availability check, design-review checklist