← AXS-026

Circuit review & bench-test guide

AXS-026 — Sound trigger PMOD module

Document purpose#

This document explains the axs-026-sound-trigger PMOD module at component level and turns the design evidence into a practical manual-review and bench-test plan. It is based on the generated schematic (generate_design.py, rev 0.1-schematic), the module README, the shared PMOD conventions in ../../pmod-common/PMOD-SPEC-NOTES.md, and the manufacturer datasheets cited in section 6.

This board is a schematic-complete prototype. It has NOT been laid out, fabricated, assembled, or bench-verified. Repository status: schematic generated, ERC clean (0 errors / 0 warnings), netlist reviewed; PCB layout not started. Every voltage, gain, timing, and threshold figure below is a design target computed from the schematic and the datasheets — it is evidence to verify on the first article, not proof that a board works.

1. What the board does#

An electret capsule feeds a MAX9814 microphone amplifier with automatic gain control (AGC) and a built-in low-noise microphone bias. The amplifier output is AC-coupled, re-biased to half-rail, and compared against a trimmer-set threshold by an LMV7219 push-pull comparator. The PMOD host sees a clean 3.3 V digital SOUND pulse on pin 1 (a GPIO edge-detect lesson, level L1) and the raw analog amplifier output on pin 2 (SOUND_RAW) for scope probing.

It has no ADC and no digital interface — the contract is a single GPIO edge plus one analog test signal. It does not measure loudness; it detects transients that cross the set threshold.

Functional block diagram#

 acoustic          MICBIAS (2.0 V)
 pressure               ^
    |                   | R1 2.2k
    v                   |
 MK1 electret ──MIC_P──┬── C1 100n ──> MICIN                     3V3
 capsule               |                  |                       |
                      GND          U1 MAX9814                R2 100k
                            (12 dB LNA + VGA + 8/18/28 dB)        |
                 JP1 gain strap ──> GAIN          AMP_OUT ── C6 ──┬── CMP_IN
                 C3 470n ─────────> CT  (attack/release)    1uF   |    |
                 A/R = GND (1:500)               (1.23 V bias) R3 100k |
                 TH = 3V3 (see 6.2!)                              |    v
                                                                 GND  U2 LMV7219 +in
                                                                       |
                 RV1 10k trimmer ── THRESH ──────────────> U2 -in      |
                                                            CMP_OUT ───┘
                                                               |
                              AMP_OUT ── R5 100R ──> J1 pin 2 (SOUND_RAW)
                              CMP_OUT ── R4 100R ──> J1 pin 1 (SOUND)

2. Safety and scope boundaries#

• The module is 3.3 V only. Power it from a PMOD host socket or a bench supply set to 3.3 V with the current limit at or below 50 mA. Never apply 5 V: the LMV7219 absolute maximum supply is 5.5 V, but the PMOD contract and the capsule bias design assume 3.3 V.
• Expected module draw is roughly 5 mA (U1 3.1 mA typical, U2 about 1 mA, capsule bias below 0.5 mA) — far inside the PMOD "about 100 mA" guidance.
• All measurements are ground-referenced to module GND (J1 pins 5/11). There are no hazardous voltages; the risks here are wrong conclusions, not injury. Acoustic tests (claps) are hearing-safe at normal effort.
• Do not drive SOUND or SOUND_RAW from the host: both are module outputs. The 100 Ω module series resistors plus the host-side 200 Ω PMOD resistors limit contention current, but a host pin misconfigured as a driven output is still a wiring fault to fix, not to tolerate.
• MAX9814 maximum capacitive drive is 200 pF. Use a 10x scope probe on SOUND_RAW; a long piece of coax (about 100 pF/m) directly on the pin can destabilize or bandwidth-limit the amplifier output.
• A working clap trigger is not a calibrated sound-level measurement and no EMC/ESD/environmental claim follows from it.

3. Power and signal path#

1. 3V3 arrives on J1 pins 6/12, GND on pins 5/11. C7 (1 uF) + C8 (100 nF) bypass U1; C9 (100 nF) bypasses U2. U1 SHDN is tied to 3V3, so the amplifier is always enabled (datasheet: do not float SHDN).
2. U1's internal MICBIAS regulator (2.0 V typical, 1.84–2.18 V) feeds the electret capsule through R1 (2.2 kΩ), the datasheet-recommended value. C2 (470 nF) bypasses MICBIAS.
3. The capsule's audio signal on MIC_P is AC-coupled by C1 (100 nF) into MICIN (input impedance 100 kΩ typical), giving an input high-pass corner of about 15.9 Hz.
4. U1 amplifies in three stages: fixed 12 dB LNA, AGC-controlled VGA (+20 dB down to 0 dB), and an output stage strapped by JP1/GAIN. Default JP1 1-2 bridged puts GAIN at GND = 50 dB overall (no compression). MICOUT sits at a 1.23 V DC bias (1.14–1.32 V).
5. C3 (470 nF) on CT sets the AGC attack time (about 1.1 ms); A/R strapped to GND selects the 1:500 attack:release ratio (release about 550 ms); hold is fixed at 30 ms. TH is strapped to 3V3 — see the finding in section 6.2: this most likely disables the AGC entirely.
6. C6 (1 uF) AC-couples AMP_OUT into CMP_IN, which R2/R3 (100 kΩ each) re-bias to half-rail (1.65 V nominal). The coupling corner into the 50 kΩ Thevenin bias impedance is about 3.2 Hz.
7. U2 compares CMP_IN (+in) against THRESH (-in), the wiper of RV1 (10 kΩ trimmer across 3V3/GND). Push-pull output: SOUND is high while the audio instantaneously exceeds the threshold, with about 7 mV internal hysteresis. No pull-up is needed.
8. R4 and R5 (100 Ω each) are series protection on both module-driven lines.

Why the comparator polarity matters#

+in is the signal and -in is the threshold, so with RV1 set above 1.65 V the idle SOUND state is LOW and sound transients produce HIGH pulses. If the trimmer is set below the 1.65 V bias point the output idles HIGH and pulses low — a legitimate configuration, but the HDL edge detector must know which polarity was chosen. Bench setup should record the wiper voltage explicitly.

4. Interfaces#

PMOD Type 1 (GPIO) per Digilent Pmod spec 1.2.0; pin 1 is the upper-row rightmost pin viewed from the module top with the connector toward you (see ../../pmod-common/PMOD-SPEC-NOTES.md).

No dedicated test points exist yet — the PCB is not laid out. Add TPs for AMP_OUT, CMP_IN, THRESH, and GND during layout; until then probe the component pads above.

5. Component-by-component review#

5.1 Actives and the acoustic front end#

5.2 Bias, coupling, and AGC timing passives#

5.3 Threshold, gain strap, protection, and connector#

6. Datasheet summary and design interpretation#

Datasheets actually fetched and read for this review (retrieved 2026-07-14):

• MAX9814 Rev 2 (19-0764, 6/09) — fetched from the Adafruit mirror; the official copy is at analog.com (the analog.com fetch timed out during this review — confirm latest rev before procurement).
• LMV7219 SNOS458I (rev. June 2016) — ti.com.
• CUI CMC-4013-SMT-TR (dated 01/09/2020, watermarked DISCONTINUED) — cuidevices.com.

6.1 Verified key figures used in this guide#

6.2 FINDING — TH strapped to 3V3 probably disables the AGC#

The schematic ties TH to 3V3. Per the datasheet, the AGC engages when the output exceeds 2 x V_TH peak-to-peak, and V_TH is meant to be set by a resistive divider from MICBIAS (typical application: 150 kΩ/100 kΩ from the 2 V MICBIAS gives V_TH = 0.8 V, clamping at 1.6 Vp-p). With V_TH = 3.3 V the clamp level would be 6.6 Vp-p — unreachable on a 3.3 V supply where the output can swing at most about 2 Vp-p (and V_OH is 2.45 V typical). The documented way to disable AGC is TH = MICBIAS; TH = VDD is not a documented configuration. Expected consequence: no compression at all — the board would behave as a fixed 50 dB amplifier that clips on loud input, which contradicts the README's stated operating principle ("AGC keeps the audio level roughly constant"). Bench step D below tests exactly this. If no compression is observed, rework TH to a divider from MICBIAS (e.g., the datasheet's 150 kΩ/100 kΩ) and update generate_design.py before layout.

6.3 Secondary review notes#

• LMV7219 CM ceiling: with RV1 turned toward 3V3, THRESH exceeds the guaranteed 2.1 V common-mode range. Keep the useful threshold window at about 1.7–2.0 V; treat trimmer settings above 2.1 V as out-of-spec.
• CMP_IN can swing about +/-1 V around 1.65 V on loud input, i.e. up to about 2.65 V — also above the CM ceiling for brief peaks. The LMV7219 tolerates input excursions (abs max V+ +0.4 V) but accuracy is only guaranteed inside the CM range; trigger timing on extreme peaks may vary.
• The capsule is discontinued: qualify a substitute (same -42 dB class, 2 V/2.2 kΩ bias) and re-check R1 against the substitute's datasheet.
• Idle noise vs threshold: 50 dB gain on the amplifier's 430 uV_RMS output noise means the threshold must sit at least a few tens of mV above bias to avoid noise-triggering; the trimmer gives ample range.

7. Expected values before bench testing#

All values are design targets computed from the schematic and datasheets.

8. Manual schematic and assembly review checklist#

• Verify U1 TDFN-14 pin-1 orientation and exposed-pad soldering (X-ray or angled inspection); verify U2 SOT-23-5 orientation.
• Confirm JP1 is bridged 1-2 only (GAIN = GND = 50 dB). Both-bridged is a supply short through the jumper.
• Confirm MK1 polarity: Term.1(+) to MIC_P, Term.2(-) to GND, per the CUI drawing. Confirm the capsule's acoustic ports are unobstructed.
• Measure R1, R2, R3, R4, R5 values in-circuit before power (R2/R3 read about 100k each; the pair reads 50k from CMP_IN to either rail).
• Confirm C6 is fitted (without it the trigger can never fire) and C4 is the 2.2 uF part on CG, not swapped with a 470 nF.
• Verify SHDN and TH connectivity as-built matches the schematic — and record explicitly that TH = 3V3 (finding 6.2) so the AGC test result is interpreted correctly.
• Verify J1 pin-1 orientation against PMOD-SPEC-NOTES (upper row, rightmost from module top, connector toward you) and >25 mil edge clearance once a layout exists.
• Set RV1 mid-travel (about 1.65 V wiper) before first power so the idle state is near the decision point, then set the real threshold in step C.

9. Ordered bench-test procedure#

Bench context: either (a) a PMOD host — AruviX ECP5 rev-A or any 3.3 V Digilent-compatible PMOD socket — with a scope/logic analyzer on pins 1–2, or (b) a bench 3.3 V current-limited supply wired to J1 pins 6/12 (3V3) and 5/11 (GND) plus DMM and 2-channel scope. Stop at the first abnormal result and record everything with board serial, equipment IDs, and operator.

A. Unpowered inspection and resistance#

1. Complete the checklist in section 8.
2. Measure 3V3-to-GND resistance in both meter polarities; investigate anything under about 10 kΩ before power.
3. Verify RV1 end-to-end reads about 10 kΩ and the wiper sweeps smoothly.

B. First power and DC bias survey (quiet room)#

1. Apply 3.3 V with a 50 mA current limit (bench supply first if available).
2. Record supply current: expect about 4–5.5 mA; investigate above 10 mA.
3. DMM survey against the section 7 table: MICBIAS (1.84–2.18 V), MIC_P (roughly 0.9–1.9 V), AMP_OUT DC (1.14–1.32 V — this is the datasheet's exact 1.23 V typical output-bias check), CMP_IN (about 1.65 V), THRESH (wiper position).
4. Scope SOUND_RAW: quiet-room trace is the 1.23 V bias with millivolt noise/room pickup. Speaking should visibly modulate it.

C. Threshold setup and static trigger check#

1. Set RV1 so THRESH reads 1.90–1.95 V (about 250–300 mV above the CMP_IN bias — comfortably above noise, inside the 2.1 V CM ceiling).
2. Confirm SOUND (J1 pin 1) idles LOW and is glitch-free in a quiet room for at least 60 s.
3. Speak loudly near the capsule: SOUND must emit pulse bursts. Measure V_OL/V_OH at the pin.
4. Sweep RV1 downward until room noise just triggers, note that wiper voltage, then set the operating point above it with margin. Record both.

D. MAX9814 AGC verification (output amplitude vs input level)#

This step doubles as the test of finding 6.2. The AGC, if active, holds the output envelope near a clamp level; if inactive, output scales linearly with input until clipping near 2 Vp-p.

1. Scope SOUND_RAW, AC-coupled, 200 ms/div to see envelopes.
2. Speak softly at a fixed distance (about 30 cm); record the envelope amplitude. Speak loudly at the same distance; record again.
3. Interpretation: a level difference much smaller than the obvious acoustic difference (compression) means the AGC is engaging — unexpected with TH = 3V3. A proportional level difference ending in visible clipping at about 2 Vp-p means the AGC is NOT engaging — the predicted outcome, which confirms finding 6.2 and requires the TH rework before the module's stated behavior is true.
4. AGC attack/release timing (run after the TH rework, with a divider from MICBIAS setting V_TH): play a sudden loud tone burst on top of a quiet background. Expect the datasheet strapping values for C_CT = 470 nF and A/R = GND: gain reduction settling in about 1.1 ms (attack), output held for the fixed 30 ms hold, then gain recovering over about 550 ms (release, 1:500 ratio). Capture one envelope showing all three phases.
5. Repeat step 2 after the rework and verify the loud/soft envelope difference is now compressed (up to 20 dB of VGA range).

E. Clap test (transient trigger, two-channel capture)#

1. Scope CH1 on SOUND_RAW (or CMP_IN), CH2 on SOUND (J1 pin 1). Single-shot trigger on CH2 rising edge, 10 ms/div, threshold from step C (wiper about 1.9 V, i.e. trip at about +250 mV audio peak).
2. Clap once about 1 m from the capsule. Expected capture: CH1 shows a sharp transient reaching or clipping at the about 2 Vp-p ceiling and ringing down over tens of ms; CH2 shows a BURST of fast pulses — one pulse per positive threshold crossing, individual pulses tens of microseconds to a few milliseconds wide, the burst lasting roughly as long as CH1 stays above threshold (typically 5–50 ms). A single clean wide pulse is NOT the raw behavior; debouncing/pulse-stretching is the FPGA lesson.
3. Verify pulse edges are clean (LMV7219 rise/fall is nanoseconds; expect some ringing on an unmatched probe — use short ground springs).
4. Repeat at 3 m and with soft finger snaps to bound the practical range at the chosen threshold. Record trip margin vs distance.
5. If the TH rework was applied: clap twice 100 ms apart and observe the second response reduced by AGC gain reduction (release is 550 ms), a useful demonstration of why AGC changes re-trigger behavior.

F. Host integration (PMOD)#

1. Move the module to the ECP5 host socket. Confirm pin-1 orientation before insertion.
2. Run a GPIO edge-count design; verify clap bursts are counted and that a fabric debounce/stretch (for example 50 ms) yields one event per clap.
3. Confirm SOUND_RAW on pin 2 still scopes correctly through the host socket's 200 Ω series resistor (expect negligible attenuation into a high-impedance probe).

10. Troubleshooting map#

11. Bench record template#

12. Review conclusion#

The signal chain is coherent and closely follows the MAX9814 typical application: correct capsule bias (2 V through 2.2 kΩ), all five datasheet support capacitors present with the right values, a proper trilevel GAIN strap, a half-rail re-bias into a fast push-pull comparator, and series protection on both module-driven pins. Two findings gate release: (1) TH is strapped to 3V3, which is not a documented MAX9814 configuration and almost certainly disables the AGC that the module's concept depends on — rework TH to a divider from MICBIAS and re-verify compression on the bench; (2) the CUI CMC-4013-SMT capsule is discontinued, so a substitute must be qualified before layout. Secondary notes: keep the trimmer threshold at or below about 2.0 V to respect the LMV7219 common-mode ceiling at 3.3 V, and expect pulse bursts (not single pulses) on transients — the digital cleanup belongs in the FPGA. Nothing here is bench-verified yet; every number above is a target for the first article.