← AXC-005

Circuit review & bench-test guide

AXC-005 — nRF24L01+ socket carrier PMOD module

Document purpose#

This document explains the axc-005-nrf24 PMOD module at component level and turns the design evidence into a practical manual-review and bench-test plan. It is based on generate_design.py, README.md, and the ERC report in reports/.

This board has never been fabricated. Repository status is schematic generated, ERC clean (0 errors / 0 warnings), netlist reviewed; PCB layout not started; not released. There is no PCB, no BOM export, no DRC record, and no first-article bench result. Every number below is a target to verify against real hardware, not a proven result.

1. What the board does#

The board is a socket carrier for the ubiquitous nRF24L01+ 2.4 GHz packet-radio breakout — no RF silicon lives on this PCB. A standard 2×4 socket (J2) accepts the breakout; the carrier adds the platform's SPI conditioning, the CE/~IRQ control network, and — critically — bulk capacitance at the socket to survive the transmit power-amp ramp. It is a PMOD Type 2A "expanded SPI" module: SPI mode 0 at ≤ 8 MHz (10 MHz absolute max), CE to trigger/gate the radio, and an active-low ~IRQ on a PMOD pin per the platform interrupt rule. It is the cheap two-way robot remote, pairing with the joystick (axo-013) and the actuator line.

Functional block diagram#

PMOD host (3.3 V)              Carrier                nRF24L01+ breakout
┌────────────────┐   ┌──────────────────────┐   ┌────────────────────┐
│ 1 CS_N ────────┼──>│ J2.4 CSN             │   │ SPI slave          │
│ 2 MOSI ────────┼──>│ J2.6 MOSI            │   │ 2.4 GHz ShockBurst │
│ 3 MISO <──R1───┼───│ J2.7 MISO            │   │ PCB antenna ►►     │
│ 4 SCK ─────────┼──>│ J2.5 SCK             │   │ (hangs off-board)  │
│ 7 IRQ_N <─R2───┼─┬─│ J2.8 IRQ  (R3 10k PU)│   │                    │
│ 8 CE ──────────┼─│─│ J2.3 CE   (R4 10k PD)│   │ 1 GND  2 VCC       │
│ 6/12 3V3 ──────┼─│>│ J2.2 VCC ─ C1 100n + │   │                    │
│ 5/11 GND ──────┼─┴─│ J2.1 GND    C2/C3 2×10µ                       │
└────────────────┘   └──────────────────────┘   └────────────────────┘

2. Safety and scope boundaries#

• Everything is 3.3 V; hazard to people is negligible. The two real risks are brownout during the TX power-amp ramp (the classic nRF24 failure: works in RX and on the bench supply, resets or "goes deaf" the moment it transmits from a thin rail) and a reversed breakout silently swapping VCC onto GND.
• ORIENTATION CHECK — before applying power. J2 pin 1 is the breakout's GND corner and pin 2 is VCC. The generic nRF24 breakout has its own 2×4 key/silkscreen; match the breakout's own pin-1 marking to J2 pin 1 before plugging it in. A 180°-reversed module puts 3.3 V onto the GND pin and ground onto VCC — instant damage. There is no keyed connector enforcing this on rev 1 (silkscreen only), so it is a manual check every time.
• The nRF24L01+ is a 3.3 V part; its logic is NOT 5 V tolerant on VCC. Never feed 5 V at J2. There is no regulator on this board — the socket VCC is the PMOD/external 3.3 V directly.
• Standalone bench work must use a current-limited 3.3 V supply set to ~250 mA. A 100 mA limit will collapse the rail during the TX ramp and produce the exact brownout signature you are trying to avoid.
• RF keep-out is a layout promise: the socket sits at the board edge so the breakout's PCB antenna overhangs off-board. Do not operate it pressed against metal or a ground plane.
• ERC-clean is a schematic check only. Bulk-cap placement at the socket pins and antenna overhang are layout obligations, not proven facts.

3. Power and control sequence#

1. Socket VCC (J2.2) comes from PMOD 3V3; C1 (100 nF) + C2/C3 (2 × 10 µF) sit right at the socket to source the TX-ramp current the breakout's own small caps cannot.
2. The breakout powers up in Power Down and the host brings it through Standby to active modes via the CONFIG register.
3. CE idles low — R4 (10 k) is a pull-down, so the radio stays in Standby-I until the host deliberately drives CE high. This prevents a floating CE from starting an unwanted transmit at power-on.
4. ~IRQ (J2.8) is active-low and pulled up by R3 (10 k) on-carrier; it asserts on TX-done, RX-done, or MAX_RT and reaches the host through R2.
5. SPI mode 0: CSN low selects the radio; commands (R_REGISTER / W_REGISTER / W_TX_PAYLOAD, etc.) clock at ≤ 8 MHz.
6. To transmit: load a payload, then pulse CE high for > 10 µs; the PA ramps (the current spike) and the packet goes out with auto-ack. To receive: hold CE high to keep the radio listening.

4. Interfaces#

There are no dedicated test points; bench probing is at J1 pins, the socket pins, and the passive bank.

5. Component-by-component review#

5.1 Socket and radio#

5.2 SPI/IRQ conditioning and CE default#

5.3 Socket bulk and decoupling#

Every ref-des is covered: J1, J2, R1–R4, C1–C3.

6. Datasheet summary and design interpretation#

The nRF24L01+ datasheet is the Nordic Product Specification; verify the exact breakout variant (plain PCB-antenna vs +PA/LNA SMA), as the +PA/LNA variant draws far more TX current and needs even more bulk.

7. Expected values before bench testing#

All values are design targets for a board that does not yet exist.

8. Manual schematic and assembly review checklist#

• Confirm J2 pin numbering: pin 1 = GND corner, pin 2 = VCC; verify against the specific breakout's key/silkscreen. Mark orientation on the board silkscreen at layout.
• Verify R4 is a pull-down to GND (CE default-standby), not a pull-up.
• Confirm R3 pulls ~IRQ to 3V3 and R1/R2 sit in the module-driven MISO/~IRQ paths; SCK/MOSI/CSN/CE are direct.
• Confirm C2/C3 are the 10 µF parts and (at layout) sit tight to the socket VCC/GND pins.
• Layout (future): socket at the far edge so the breakout antenna overhangs off-board; no metal/pour under the antenna.
• Confirm host gateware idles CSN high and CE low except during deliberate TX pulse / RX hold.

9. Ordered bench-test procedure#

Stop at the first abnormal result. Record board serial, breakout variant and marking, and supply identity. Verify breakout orientation before every power-on.

A. Unpowered inspection and resistance tests (breakout removed)#

1. Visual: socket, passive bank, silkscreen orientation mark.
2. DMM: VCC-to-GND both polarities; MISO/~IRQ series ≈ 100 Ω; ~IRQ to 3V3 ≈ 10 k; CE to GND ≈ 10 k. Confirm no VCC-GND short.

B. Orientation and power-on#

1. Confirm the breakout's pin-1/GND marker aligns with J2 pin 1, then seat it fully.
2. Power at 3.3 V, 250 mA limit. Expect a small idle current, no heating. Any large current draw = suspect a reversed breakout — remove power.

C. SPI identity and register bring-up#

1. With a logic analyzer or host in a safe mode (CE held low), read CONFIG (0x00); expect 0x08 after a fresh power-on. A wrong value stops the test — debug SPI/CSN/orientation first.
2. Write and read back a scratch register (e.g. an address register or RF_SETUP) to confirm write access.
3. Read STATUS and the FIFO_STATUS to confirm sane defaults.

D. Transmit-ramp / brownout characterisation (the carrier's core test)#

1. Insert a current probe/shunt in the 3.3 V feed; scope it and VCC (at C2/C3) simultaneously.
2. Configure a PTX, load a payload, and pulse CE high > 10 µs. Capture the PA-ramp current spike and the minimum VCC. VCC must stay > 3.0 V.
3. Deliberately reproduce the brownout signature once for the record: set the bench limit to 100 mA and transmit repeatedly; document the resets / MAX_RT behaviour so field failures are recognisable. Restore 250 mA after.

E. Two-module ping test (the real RF test)#

1. Bring up a second nRF24 node (a second AXC-005 is ideal) with matching channel, data rate, address, and auto-ack.
2. PTX pulses CE, sends a payload; confirm TX_DS (auto-ack received) on the transmitter and RX_DR on the receiver via STATUS/~IRQ.
3. Log packet-error rate over N packets; sweep a couple of data rates and channels. Check antenna overhang / no nearby metal.

F. Host (PMOD) bring-up and robustness#

1. Repeat C–E through the FPGA fabric SPI; compare against a logic-analyzer tap. Exercise the CE-pulse and ~IRQ handling from gateware.
2. Measure PMOD 3V3 droop at the socket during a TX ramp before trusting long sessions.
3. 50 power cycles with a transmit each time; count failures.

10. Troubleshooting map#

11. Bench record template#

12. Review conclusion#

This carrier carries no radio silicon — its whole value is the socket, the control-default network, and the bulk. The two features that earn it are R4's CE pull-down (radio powers up safely in Standby, never transmitting on a floating pin) and the 2 × 10 µF socket bulk that keeps the TX power-amp ramp from browning out the rail. The two operating disciplines are the orientation check (pin-1 = GND corner; a reversed breakout swaps VCC onto GND and destroys it) and the CONFIG = 0x08 read as the SPI bring-up gate. The most valuable bench activity is the shunt-and-scope TX-ramp capture in 9.D, and the two-module ping in 9.E is the real RF proof. Open risks: no PCB exists (bulk placement and antenna overhang are promises), and the +PA/LNA breakout variant, if used, needs even more bulk than rev 1 provides.