Actuator modules

AXA-009 — WS2812 LED strip driver PMOD module

Catalog #9 in the AruviX actuator line, level L2. One 74AHCT125 buffer gate shifts the host's 3.3 V single-wire WS2812 stream to a clean 5 V DOUT; strip power comes in on its own screw terminal.

Circuit review & bench-test guide →

Components#

Every placed component, with the reason it is on the board. Extracted directly from the schematic, so this cannot drift from the design.

Signals#

Net labels used in the schematic, which are also the names the HDL top level should use.

3V3 DATA DOUT DOUT_BUF GND V5_LED

Production status#

Source: boards/actuator-modules/axa-009-ws2812

Catalog #9 in the AruviX actuator line (../README.md), level L2. One 74AHCT125 buffer gate shifts the host's 3.3 V single-wire WS2812 stream to a clean 5 V DOUT; strip power comes in on its own screw terminal.

Status: schematic generated, ERC clean (0/0), netlist reviewed. PCB layout not started. Not released.

What it teaches#

The WS2812 timing lesson already name-checked in the sensor-line learning path: one wire, 800 kHz, 1.25 µs bit period, 0/1 encoded by pulse width (T0H ≈ 400 ns, T1H ≈ 800 ns, ±150 ns tolerance), >50 µs low to latch. Generate the stream in fabric with the shared ws2812_tx HDL core (../../pmod-common/hdl/) — cycle-exact timing is trivial in an FPGA and painful everywhere else.

Design#

• SN74AHCT125PW (TI, TSSOP-14). AHCT = TTL-threshold inputs (V_IH = 2.0 V), so the PMOD's 3.3 V drives it directly while VCC runs at the strip's 5 V — the proper 3.3 V→5 V shift the line rule demands (never drive a 5 V WS2812 chain from a 3.3 V pin).
• Strip power (V5_LED, 5 V) enters on the J2 screw terminal only — never through the PMOD. Budget 60 mA per pixel at full white. Grounds join on the module.
• Gate 1: ~OE to GND (always enabled), input = PMOD DATA, output through R1 100 Ω (series damping, placed at the connector) to J3 pin 2 DOUT.
• Unused gates 2–4: ~OE and inputs tied to GND — outputs actively drive low and are left open (a defined, harmless state; nothing floats).
• Strip connector J3: 1x03 screw terminal, V5_LED / DOUT / GND.
• Decoupling: 100 nF + 10 µF fitted at the buffer. C3 (1000 µF SMD electrolytic, 8×10 mm pad) is DNP — on-module bulk cannot save a long strip; fit ≥470 µF external bulk at the strip head and re-inject 5 V every ~100 pixels instead.

Regenerate#

python3 generate_design.py

Remaining for release#

• [ ] PCB layout (20 × 40 mm actuator outline), DRC, fab outputs
• [ ] hdl/: instantiate the shared ws2812_tx core + demo pattern generator, testbench, ECP5 demo
• [ ] BOM export and availability check, design-review checklist